2011.12.01
Overview
Embedded systems are provided, which includes a processing unit and a memory The processing unit simultaneously executes first thread having a flag for performing a data acquisition operation and second thread for performing a data process and output operation for the acquired data in the data acquisition operation. The flag is used for indicating whether a state of the first thread is in an execution state or a sleep state. The memory which is coupled to the processing unit provides a shared buffer for the first and second threads. Before executing the second thread, the flag is checked to determine whether to execute the second thread, wherein the second thread is executed when the flag indicates the sleep state while execution of the second thread is suspended when the flag indicates the execution state.Category
發明
Patented
100144113
發明第I439925號
Filing Date
2011.12.01Expired Date
2031.11.30Notification
2026.11.13