2021.11.03
Overview
A synchronization management server includes a processor and memory. The processor includes a resource control circuit, a synchronization management circuit, and an editing circuit. The resource control circuit generates an initialization page to be transmitted to the first electronic device to display several elements and the editing status corresponding to each element. When the first electronic device receives the editing instruction of the first element whose first editing status is unlocked, the first post-editing message is generated, and the first editing state of the first element is set to be locked. The synchronization management circuit determines whether to update the first editing state of the first element according to the first post-editing message sent by the first electronic device, and synchronizes the first editing state of the first element to several electronic devices. The editing circuit updates the file according to the first post-editing message.Category
發明
Patented
110141033
發明第I788085號
Filing Date
2021.11.03Expired Date
2041.11.02Notification
2023.11.10